1. Field of the Invention
This invention relates in general to means and methods for making contact to electrical devices and, more particularly, to improved means and methods for making contact to electrical devices requiring a large number of external connections.
2. Description of the Prior Art
The complexity of electrical devices, particularly monolithic integrated circuits, is rapidly increasing. Large scale integrated (LSI) circuits having 10.sup.3 to 10.sup.4 devices per chip are commonplace. Very large scale integrated (VLSI) circuits having 10.sup.4 to 10.sup.5 devices per chip are now in volume production and others having 10.sup.5 to 10.sup.6 devices per chip are presently being designed and tested. Even more complex circuits are envisioned.
The required pin-count, that is, the quantity of external connections or leads which must be attached to each chip, is also increasing, although less rapidly than the device count. Nevertheless, pin-counts exceeding 10.sup.2 leads per device are now important. These high pin-counts require that a large number of wire bonds or other connection means between the bonding pads on the chip and the bonding areas on the package be placed in close proximity without shorts. At the same time, it is necessary to maintain low lead resistance and inductance, and frequently to remove substantial amounts of heat from the device. The combination of these requirements, that is, (1) large pin-counts, (2) closely spaced leads, (3) low lead resistance and inductance, and (4) large power dissipation, give rise to problems which have not been adequately solved in the prior art.
To reduce lead crowding, prior art packages have made use of multiple wiring levels each containing many leads, so that several rows of bonding areas on the package can be arranged one above and behind the other, somewhat like the keyboards of a large pipe organ, but wrapped around into a closed circle or rectangle. However, the prior art arrangement of package leads and bonding areas on several levels has aggravated the problem of wire bond cross-over and shorting. In addition, lead voltage drop within the package has not been minimized. The word "package", as used herein, refers to an enclosure for housing electronic components or devices and permitting convenient electrical coupling thereto. The words "wire bond" are intended to refer generally to means for electrically connecting bonding pads or bumps on an electrical device to associated bonding areas on the package used to house the device.
Accordingly, it is an object of the present invention to provide an improved means for arranging and configuring leads, bonding areas, and pads on device enclosures and devices to eliminate wire bond cross-over.
It is a further object of the present invention to provide an improved means for arranging and configuring package leads and bonding areas to reduce series lead resistance and inductance within the enclosure, in particular to reduce series resistance and inductance of power leads, that is, those leads which carry substantial currents.
It is an additional object of the present invention to provide an improved means for arranging and configuring package leads and bonding areas so as to be compatible with obtaining high power dissipation.
It is a further object of the present invention to provide improved enclosures for electrical devices having multiple bonding pads.
It is a still further object of the present invention to provide an improved method for interconnecting enclosures and devices.
As used herein, the words "pad(s)" or "bonding pad(s)" refer to metallized regions on the device, e.g. a semiconductor chip, suitable for attachment of wire bonds or other connection means. The words "bonding area(s)" refer to metallized regions on the package or enclosure suitable for attachment of wire bonds or other connection means from the device. The words "wire(s)" or "bonding wire(s)" refer generally to the electrical connection means running between the bonding pads and the bonding areas. The connection means may have any useful cross-sectional shape, e.g. round, square, rectangular, etc., and be single or multiple. The words "bonding path(s)" refer to the location(s) of the bonding wires(s). The words "wire bond(s)" refer to the welded or soldered connection between a bonding wire or connection means, and a bonding pad or bonding area. The word "pin(s)" refers to the parts of the package where connection is made to the external socket or circuit. The words "lead(s)", "interconnect(s)", "interconnect lead(s)", "lead run(s)" and "interconnect lead run(s)" refer to metallized conductive path(s) within the package which generally electrically couple the bonding areas on the package to the package pins.